diff --git a/chipflow/config/models.py b/chipflow/config/models.py
index fda202bb..166df432 100644
--- a/chipflow/config/models.py
+++ b/chipflow/config/models.py
@@ -15,8 +15,10 @@ class Process(Enum):
     """
     #: Skywater foundry open-source 130nm process
     SKY130 = "sky130"
-    #: GlobalFoundries open-source 130nm process
+    #: GlobalFoundries open-source 130nm process (c4m-gf180 variant)
     GF180 = "gf180"
+    #: GlobalFoundries open-source 180nm MCU PDK
+    GF180MCU = "gf180mcu"
     #: Pragmatic Semiconductor FlexIC process (old)
     HELVELLYN2 = "helvellyn2"
     #: GlobalFoundries 130nm BCD process
diff --git a/chipflow/platform/silicon.py b/chipflow/platform/silicon.py
index ec24dd75..927c0d0d 100644
--- a/chipflow/platform/silicon.py
+++ b/chipflow/platform/silicon.py
@@ -342,7 +342,7 @@ def port_for_process(p: Process):
     match p:
         case Process.SKY130:
             return Sky130Port
-        case Process.GF180 | Process.HELVELLYN2 | Process.GF130BCD | Process.IHP_SG13G2:
+        case Process.GF180 | Process.GF180MCU | Process.HELVELLYN2 | Process.GF130BCD | Process.IHP_SG13G2:
             return SiliconPlatformPort