From a45bfd6ee50dc248c5f1a02b19d137e9963b89b7 Mon Sep 17 00:00:00 2001 From: Serge Rabyking Date: Thu, 14 May 2026 20:13:26 +0200 Subject: [PATCH] feat(process): add GF180MCU process variant GF180MCU is the GlobalFoundries open-source 180nm MCU PDK, distinct from the existing c4m-gf180 variant ("gf180"). Both share the GlobalFoundries 180nm node but use different cell libraries and IO conventions, served by separate techno plugins on the backend (techno-c4m-gf180 vs techno-gf180mcu). - Add Process.GF180MCU = "gf180mcu" alongside GF180. - Route it through port_for_process to SiliconPlatformPort (same default as the other non-Sky130 processes). Clarify the GF180 docstring to flag the variant distinction. --- chipflow/config/models.py | 4 +++- chipflow/platform/silicon.py | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/chipflow/config/models.py b/chipflow/config/models.py index fda202bb..166df432 100644 --- a/chipflow/config/models.py +++ b/chipflow/config/models.py @@ -15,8 +15,10 @@ class Process(Enum): """ #: Skywater foundry open-source 130nm process SKY130 = "sky130" - #: GlobalFoundries open-source 130nm process + #: GlobalFoundries open-source 130nm process (c4m-gf180 variant) GF180 = "gf180" + #: GlobalFoundries open-source 180nm MCU PDK + GF180MCU = "gf180mcu" #: Pragmatic Semiconductor FlexIC process (old) HELVELLYN2 = "helvellyn2" #: GlobalFoundries 130nm BCD process diff --git a/chipflow/platform/silicon.py b/chipflow/platform/silicon.py index ec24dd75..927c0d0d 100644 --- a/chipflow/platform/silicon.py +++ b/chipflow/platform/silicon.py @@ -342,7 +342,7 @@ def port_for_process(p: Process): match p: case Process.SKY130: return Sky130Port - case Process.GF180 | Process.HELVELLYN2 | Process.GF130BCD | Process.IHP_SG13G2: + case Process.GF180 | Process.GF180MCU | Process.HELVELLYN2 | Process.GF130BCD | Process.IHP_SG13G2: return SiliconPlatformPort