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Thanks @jayleaton. The shared changes read as no-ops for existing callers: Two things before it can land:
Please also rebase onto #1766's new head once it's on main. |
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Thanks @ashhart. The line-limit fix is pushed:
Both files gain no lines, so they stay at 600 once this is on main. The later Idol PRs will add to Host gates pass here (Linux, Zig 0.17.0): We don't have GB10 time, so yes please: we'd be glad if you ran the |
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Thanks @jayleaton, both files now stay at 600 lines, and moving Idol's records into its own set file is the right shape for the PRs after this one. We'll run the |
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@jayleaton, our GB10 run of
The job's general CUDA kernel contract half compared against a base build that didn't complete on our side, so we're not reading anything from those lines. They're ours to rerun, and nothing is owed from you there. With the attention case fixed, this rebases once #1766 lands, as planned. |
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Thanks @ashhart. The attention kernel sums in fp32 (both Why it missed by only 0.3x: the values were odd integers up to 15. In the strided order each of the 32 fp16 lanes stayed below 2048, where fp16 integers are exact, so the only fp16 error was rounding f35cdd6 raises them to odd integers up to 255, still mirrored so they cancel. The lane sums now pass 2048 and round. Every fp32 partial sum stays an integer below 2^24, so fp32 is still exact in any order. On the host, gate 4's proof at the joint shape (12294 keys) now gives:
A new host test in Could you rerun |
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/atc exchange 7979a3260563fc76a06d631a0348ff6971edb9a158b0bbbc0c3d970b63c0fa93 |
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Thanks @jayleaton, that's a clear diagnosis and the right fix. Odd values below 256 The CUDA case's parity, repeats, timing and memory need the same case files we asked for on #1766 (
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Thanks @ashhart. The title and changelog line are updated in 776a333. The title drops "not yet run on a GPU". The changelog now says that on a GB10 the kernel contract passed gates 1-4 for 12 of 13 kernels, that the attention sums case got harder inputs and is waiting on your rerun, and that sm_120 is still unrun. The rebase onto main comes after #1766 lands and the release freeze ends, with Idol's set at the new end of |
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Thanks @jayleaton. The title and changelog line now match where this stands. The For the rebase once #1766 is on main:
The CUDA case's parity, repeats, timing and memory still need the case files from #1766 (
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Thanks @jayleaton. The The attention sums case now passes too, with exact sums at k 12294 where fp16 sums would miss by 248135x and bf16 by 1723x. All three planted controls fail at the shapes gate, as they should. The full kernel contract on the same tree adds no failure line that names an Idol kernel. Its other differences from main come from this branch's older base, and the rebase clears them. With that, the changelog line can say 13 of 13. The rest stands as before: the case files from #1766 for parity, repeats, timing and memory, then the rebase once #1766 is on main.
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Thanks @ashhart, good to see 13 of 13. The changelog line now says all 13 kernels pass gates 1-4 on a GB10, all 3 controls go red as planted, and sm_120 has not run ( |
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Thanks @jayleaton, and for putting 13 of 13 into the changelog line (
The case's parity, repeats, timing and memory still wait on #1766's case files. Since item 3 changes the controls image,
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Hi @jayleaton, a short pointer now that #1766 is at
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Hi @ashhart, the The arithmetic is the same.
Since the compiled norm kernels changed on sm_121 as well, could the queued GB10 |
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Rebased onto main |
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Thanks @jayleaton. Now that #1766's synthetic case is public, the CUDA case run can go too. On a GB10 we'll run:
On top of #1766, the branch merges cleanly with main
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An RTX 5090 run for the sm_120 point: the kernel contract and the synthetic case on Setup
1.
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RTX 5090 (this run, CUDA, f5b88dd98) |
M5 Ultra (jayleaton's release receipt, Metal, 9aaf5d318) |
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| branch-steps within 2x the SDK's distance | 100 of 100 | 100 of 100 |
| worst row over the run against float32 (the SDK's own: 0.10090) | 0.08109 | 0.09319 |
| repeat: the same step twice, another between | identical bytes | identical bytes |
| final sample against the SDK's: cosine, worst row (reported, not gated) | 0.998570, 1.3193 | 0.998918, 1.3187 |
| denoise, 50 steps (100 forwards) | 16.59 s, 16.88 s, 17.03 s | 27.55 s |
| load | 0.2 to 1.5 s | 0.5 s |
sample.f32SHA-256 is the same in all three runs:75019627e1b4a92a7424155e378b141951e9454b912bd87b044ac8a27a89ea6f. It is not the M5's0aedcb55…; I did not expect bit equality across devices, and the final sample's cosine to the SDK's differs in the fourth digit (0.998570 against 0.998918).- Memory: 2.16 GiB peak process footprint on the host (2.15 to 2.16 over the three runs); the device's peak was 1,948 MiB (
nvidia-smi, sampled once a second). tf-idol WEIGHTS case blocks 0: exit 0, all 23 joint blocks within the SDK's own distance from float32, for example block 12 at worst row 0.00127 against the SDK's 0.00130.
3. Gate 5 on sm_120 only
tf-cuda-test kernel-contract-limits needs all five SMs, so on a -Dsm=120 build it exits 1 for the missing images. Reading only its sm_120 lines for Idol's ten launches: all pass, 6 say (record current) and 4 say (record stale). The four differ from the records in registers only (static shared bytes and bounds equal), which I'd put down to nvcc 13.3.73 against the records' 13.0:
| launch | record | compiled here |
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tf_idol_norm |
33 | 38 |
tf_idol_norm32 |
36 | 38 |
tf_idol_qk |
27 | 25 |
tf_idol_attention |
120 | 128 |
All are within their bounds, so nothing here fails; it only says the 13.3 numbers are not the 13.0 ones.
Not run
- nvcc 13.0 and 13.2 on this card, and any GB10-side item.
- The real avocado case with encoder features (the encoders are not in this PR).
- The stacked PRs (idol: the octree and Gaussian decoders on CUDA (stacked on #1773, #1767; not yet run on a GPU) #1858 to idol: tf-idol-generate end to end on CUDA, and one GB10 qualification script (stacked on #1787, #1858-#1861; not yet run on a GPU) #1862); they are not part of this head.
Raw logs, the case checksums and the sample.f32 hash lines are available if wanted.
…reference case tool
Every pipeline of idol.metal and idol_attention.metal is registered: id_linear's eight forms (plain and GELU), id_split's two, id_gemm32, id_norm (plain, affine, modulated), id_norm32 (affine, modulated), id_norm_split, id_repo, id_qk, id_gate_add, id_embed, id_cond, id_bias32 and the attention's four forms. Each output is checked at idol-sdk's fp16 points as the range its fp32 steps allow; the NAX projections against the tensor unit's 16-deep step bound, the attention against attention_ref's formula with P at the tensor unit's fp32. Inputs at the large served shapes repeat at periods prime to every tile, so float64 stays cheap and every output is checked. 19 controls: rounding points dropped or added (gate 3), fp16 sums in id_norm32, id_repo, id_qk, id_embed and id_gemm32, and the NAX fp32 path in id_gemm32's place (gate 4), and the attention's tail keys unmasked. Gate 5 holds the 24 launches, each reserved by its source. Known finding: id_qk gives a head holding a NaN +-inf in its other outputs where F.normalize gives NaN, as Metal's max drops the NaN norm that clamp_min keeps.
…the values the units multiply
…awn N(0, 1) from a seed --synthetic-conditioning --cond-seed N replaces the encoders' features with seeded normal draws at the shapes and dtypes tf-idol reads, so a case holds nothing from a third-party encoder and can be shared. The denoiser run, its seed, schedule and files are unchanged; reference.json records the conditioning seed.
Port Idol's denoiser from Metal to CUDA under the same precision contract: fp16 block linears via cuBLASLt with fp32 sums and one rounding after the bias (tf_idol_bias), LayerNorm32 to fp16 with fp16 modulation, true-fp32 RePo/condition/output projections (CUBLAS_COMPUTE_32F), and a head-64 fp16 attention with fp32 softmax and accumulation in its own image (idol.cu, idol_attention.cuh), leaving prefill_attention.cu and its SASS untouched. - family modules zig/src/families/idol/cuda*.zig; the model refuses any GPU but sm_120/sm_121 by name with a log line; timing via the sys shim - tf-idol on CUDA (idol-cuda step) sharing the case driver with Metal (zig/tests/idol_run.zig) - cuBLASLt Linear.initTyped for fp16 and fp32 inputs; bf16 path unchanged - kernel contract: idol-contract (gates 1-4 over every idol.cu kernel and the attention, three controls dropping an fp16 rounding, in their own contract_idol_controls.cuh), Idol's set after joint_schema; nvcc 13.0 records for sm_80/86/89/120/121 joined through idol_cuda_sets.zig beside MOSS-Image's in registry_joins.zig; image in contract_limits - host tests for the family and the contract's range references, beside MiniMax's in cuda_family_host.zig
… in every order The kernel sums P x V and l in fp32. With odd values up to 15, each strided fp16 lane stayed below 2048, where fp16 integers are exact, so fp16 sums missed by only 0.3x (l's rounding). Odd values up to 255 push the lane sums past 2048 while every fp32 partial sum stays an integer below 2^24. A host test runs gate 4's three orders.
…a_common_check asks idol.cu, idol_attention.cuh and contract_idol_controls.cuh kept their own warp_sum, 8-warp block_sum and fp16 mma. They now use tf_common::warp_sum (the same butterfly), tf_common::block_sum_serial (the same 8 adds in warp order at Idol's 256 threads) and qmm_frag::mma_f16_v (the same volatile instruction). Under nvcc 13.0 every kernel but the two norms and the norm control keeps its SASS byte for byte; the norms' sm_120 registers drop to 33 and 36.
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Thanks @Nipale-ai for the RTX 5090 (sm_120) run. #1767 is now rebased onto main |
The serving pins now run on every PR, and ashhart#1767 changes two pinned files: cublaslt.zig gains Linear.initTyped (X and W as bf16, fp16 or fp32 for Idol's denoiser; initEpilogue passes bf16, so existing plans are unchanged) and kernels.zig registers the idol image. test-gradient-serving: 1/1 pass.
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Thanks @jayleaton for the rebase onto The series applies cleanly on today's main. The shared changes are still no-ops for existing callers: One thing before it lands:
Optional:
On our side, we will run the device checks on this head on a GB10:
We'll post both here. It lands right after #1766.
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…on sums P The recipe still said no CUDA kernel of this family had run on a device. It now quotes the idol-contract SUMMARY line from the GB10 (776a333, and the same result on c3a6c0c) and from the RTX 5090 at sm_120 (f5b88dd), which also passed the shared synthetic case. A GB10 case run is still to come. The attention bullet notes that CUDA sums the softmax denominator over fp32 P and rounds P to fp16 only for P.V, where Metal's id_attention rounds P first and sums the rounded values.
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Thanks @ashhart, both are done in
In the kernel contract section, "No SUMMARY line yet" is now:
And the attention bullet gains:
The |
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Thanks @jayleaton,
This push adds only that recipe commit. The other thirteen patches are the same as the ones we reviewed last time. The series applies cleanly on our main, and the host steps pass: Optional:
We will run the device check on our side on a GB10, at this head:
Once that's in, this lands right after #1766. Nothing more is needed from you.
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Stacked on #1766 (Idol's denoiser on Metal). This branch holds #1766's commits too; its own change is the five commits after
e34dab7ad(#1766's9aaf5d318, replayed on maind367f0fb7):3d8d9950c(the CUDA denoiser),2e7d31d1a(recipe),15d7a9bf0(harder attention sums inputs),0e0394fa6(the notice) andf710b4a77(sharedcommon/reduction and mma helpers, forcuda_common_check.py). Review after #1766, or diff against its branch.What this changes
Idol's denoiser on the CUDA runtime, beside the Metal family and driven by the same case driver and gates (
zig/tests/idol_run.zig;tf-idolon CUDA, stepidol-cuda). For #1757.Run on a GB10. It compiles for sm_120 and sm_121 with nvcc 13.0, and the CUDA host tests pass in a Linux box. On a GB10 (ashhart's rerun at
776a3335d), all 13 kernels pass the kernel contract's gates 1-4, and all three controls go red as planted. The restack ontoca429e95amoved the controls into their own header, soidol-contractneeds one more GB10 run onf5b88dd98(or36828402d, whose SASS is byte-identical). On sm_120, Nipale-ai's RTX 5090 run (CUDA 13.3, nvcc 13.3.73) onf5b88dd98passes the kernel contract (13 of 13 kernels, 3 of 3 controls red) and the synthetic case; its 13.3 limit numbers differ from the 13.0 records but stay within their bounds. Idol's CUDA sources are byte-identical atf710b4a77.What it adds
zig/kernels/cuda/idol.cu(built with the glue flags:--fmad=false, IEEE division and square root) andidol_attention.cuh: the norms, RePo's angles, q/k rotation andF.normalize(a NaN norm stays NaN, as torch's clamp keeps it), the gated residual, bias with GELU, the embedding, the condition sum and the fp32 bias. Attention is Idol's own head-64 kernel withvision_kernel's row arithmetic: fp16 q, k, v and P (rounded to nearest), fp32 scores, softmax and sums. No shared attention template gains an instance, so no other family's SASS changes.zig/src/families/idol/cuda*.zig: weights, the model and launchers.Model.loadadmits sm_121 and sm_120 and refuses any other GPU by name, with a log line.CUBLAS_COMPUTE_32F: fp16 block linears into fp32 sums (bias and one fp16 rounding inidol.cu), and true fp32 (fp32 inputs, no TF32) for RePo's maps, the condition embedding and the output, so CUDA needs no hi/lo split. A host test pins the compute type's value.tf-cuda-test idol-contract, gates 1-4 over everyidol.cukernel and the attention, with three controls that each drop one fp16 rounding; it is in the full contract's family sets andcontract_limits.zig. Gate-5 records (idol_cuda_records.zig) are nvcc 13.0's for sm_80, 86, 89, 120 and 121, and match the repo's parser on all 50 entries.docs/recipes/idol-cuda.md, and a changelog line.Shared code
cublaslt.zig:Linear.initTypedtakes the input and output types;Linear.initis nowinitTyped(.bf16, ...), so every existing caller builds the same plan as before.contract_attn.zig:Ref.outlets the attention check read fp16 outputs; it defaults to bf16, the only value before.host.zig/weights.zig: the fp32 host tensors' struct moves intohost.zigso both backends load it; Metal is unchanged.zig/tests/idol.zig: the case driver moves intoidol_run.zig, shared with CUDA. On Metal it gives the same gates and numbers as idol: Idol's denoiser as a native Metal family #1766's tool on the same case.idol_cuda_sets.ziginregistry_joins.zig,contract_limits.zig,main.zigandcuda.zig. Idol's set goes afterjoint_schemaincontract_family_sets.zig, and the host tests sit beside MiniMax's incuda_family_host.zig. The three controls are in their owncontract_idol_controls.cuh, included fromcontract_controls_set.cu.registry.zigandcontract_controls.cuare untouched.THIRD_PARTY_NOTICES.md:idol.cuandidol_attention.cuhjoin idol: Idol's denoiser as a native Metal family #1766's idol-sdk entry.Receipt
9aaf5d318, replayed ase34dab7ad) on maind367f0fb7; a Linux box with Zig 0.17.0 for builds, and with nvcc 13.0 for the earlier fatbin runs below; Mac Studio M5 Ultra for the Metal side.zig build test-cuda-host: 278 of 278 steps. On the first run one test failed (3,097 of 3,106 passed, 8 skipped); the rerun ran the failed binary again and it passed. I did not identify which test that was; nothing in this branch changed between the runs.zig build fatbins -Dnvcc=... -Dsm=121,120: 218 of 218 steps;idol.fatbinholds sm_121 and sm_120.zig buildfor Linux:tf-idol,tf-cuda-testandtensorfoldbuild (before the rebase onto MOSS-Image's CUDA port; the box run after it builttest-cuda-hostand the fatbins).contract_controls.cuno longer changes: main closestf_ctl_pocket_in_fmax, so the restack droppedf4a07e29e, and Idol's controls moved intocontract_idol_controls.cuh.zig build test test-golden tf-idol -Dcpu=apple_m1: 593 of 593 steps, 5,254 of 5,283 tests pass, 29 skipped, 0 fail.tf-idolon the SDK's avocado case through the shared driver: all 101 gates pass, with the same run worst row (0.04738), final-sample cosine (0.999993) and 50-step time (27.53 s) as idol: Idol's denoiser as a native Metal family #1766's tool, and identical repeats.f710b4a77(the rebase ontod367f0fb7; idol's sources unchanged), in Linux (no GPU):cuda_common_check.py0 violations,cuda_fragment_check.py0 misses, the checker unittest 9 of 9,check_cuda_sources.py12 of 12 on idol and the controls set,zig fmt --checkclean,pr_check.py --pr 17670 errors,lean_check.py0 new against main,git diff --checkclean.f5b88dd98, in Linux (no GPU):zig fmt --check build.zig zigclean;lean_check.py345 problems, the same as main;test-kernel-contract,test-idol-cuda-hostandcompile-cuda-tests48 of 48 steps, 251 of 251 tests;cuda_common_check.py0 violations,cuda_fragment_check.py0 misses, the checker unittest 9 of 9;zig build test694 of 694 steps, 7,269 of 7,313 tests (44 skipped), exit 0. nvcc 13.0.88 (container, no GPU) gives SASS and resource usage byte-identical to36828402dfor the idol and controls images on all five SMs.776a3335d):SUMMARY idol: 13 kernels, 13 pass gates 1-4, 0 fail; 3 controls: 3 red as planted, 0 missed. The attention sums case gives exact sums at k 12294, where fp16 sums would miss by 248135x and bf16 by 1723x. The first run, atd153b6cf0, passed 12 of 13: that case's inputs were too easy for fp16 to miss by 100x, andf35cdd6f1made them harder. The controls moved in the restack, so this needs a rerun onf5b88dd98(or36828402d; same SASS).idol-contractrerun onf5b88dd98(or36828402d), which is ashhart's. Gate 5 against a live driver,kernel-contract-limits, the cuBLASLt plans' algorithm search, admission on a device, weight loading, and the case's parity, repeats, timing and memory, which need a GPU run beyond the contract. nvcc 13.2 and 13.3 records are not measured yet (those compilers fall back to 13.0's).Checklist
"draft": false, a resumed prompt equals a fresh one, and concurrent equals solo. (n/a.)SUMMARYline is in the receipt. (Registered; the GB10 SUMMARY line, 13 of 13, is above.)