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[Arm64][PAC-RET] Add encoding for Pointer Authentication instructions #127949

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[Arm64][PAC-RET] Add encoding for Pointer Authentication instructions #127949

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14 changes: 14 additions & 0 deletions src/coreclr/jit/codegenarm64test.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -9140,23 +9140,37 @@ void CodeGen::genArm64EmitterUnitTestsPac()

genDefineTempLabel(genCreateTempLabel());

// IF_BR_0A
theEmitter->emitIns(INS_retaa); // RETAA
theEmitter->emitIns(INS_retab); // RETAB

// IF_PC_0A
theEmitter->emitIns(INS_autia1716); // AUTIA1716
theEmitter->emitIns(INS_autiasp); // AUTIASP
theEmitter->emitIns(INS_autib1716); // AUTIB1716
theEmitter->emitIns(INS_autibsp); // AUTIBSP
theEmitter->emitIns(INS_autibz); // AUTIBZ
theEmitter->emitIns(INS_autiaz); // AUTIAZ
theEmitter->emitIns(INS_pacia1716); // PACIA1716
theEmitter->emitIns(INS_paciasp); // PACIASP
theEmitter->emitIns(INS_paciaz); // PACIAZ
theEmitter->emitIns(INS_pacib1716); // PACIB1716
theEmitter->emitIns(INS_pacibsp); // PACIBSP
theEmitter->emitIns(INS_pacibz); // PACIBZ
theEmitter->emitIns(INS_xpaclri); // XPACLRI

// IF_PC_1A
theEmitter->emitIns_R(INS_autiza, EA_8BYTE, REG_R1); // AUTIZA <Xd>
theEmitter->emitIns_R(INS_autizb, EA_8BYTE, REG_R2); // AUTIZB <Xd>
theEmitter->emitIns_R(INS_paciza, EA_8BYTE, REG_R8); // PACIZA <Xd>
theEmitter->emitIns_R(INS_pacizb, EA_8BYTE, REG_R9); // PACIZB <Xd>
theEmitter->emitIns_R(INS_xpacd, EA_8BYTE, REG_R10); // XPACD <Xd>
theEmitter->emitIns_R(INS_xpaci, EA_8BYTE, REG_R12); // XPACI <Xd>

// IF_PC_2A
theEmitter->emitIns_R_R(INS_autia, EA_8BYTE, REG_R20, REG_SP); // AUTIA <Xd>, <Xn|SP>
theEmitter->emitIns_R_R(INS_autib, EA_8BYTE, REG_R21, REG_SP); // AUTIB <Xd>, <Xn|SP>
theEmitter->emitIns_R_R(INS_pacia, EA_8BYTE, REG_R27, REG_SP); // PACIA <Xd>, <Xn|SP>
theEmitter->emitIns_R_R(INS_pacib, EA_8BYTE, REG_R28, REG_SP); // PACIB <Xd>, <Xn|SP>
}
#endif // defined(TARGET_ARM64) && defined(DEBUG)
41 changes: 36 additions & 5 deletions src/coreclr/jit/emitarm64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -210,6 +210,9 @@ void emitter::emitInsSanityCheck(instrDesc* id)
assert(isValidImmShift(emitGetInsSC(id), id->idOpSize()));
break;

case IF_BR_0A: // BR_0A ................ ................
break;

case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
assert(isGeneralRegister(id->idReg1()));
break;
Expand Down Expand Up @@ -1112,10 +1115,11 @@ bool emitter::emitInsMayWriteToGCReg(instrDesc* id)
return true;

case IF_PC_1A: // PC_1A ................ ...........ddddd Rd
return (ins == INS_autiza || ins == INS_paciza || ins == INS_xpacd || ins == INS_xpaci);
return (ins == INS_autiza || ins == INS_autizb || ins == INS_paciza || ins == INS_pacizb ||
ins == INS_xpacd || ins == INS_xpaci);

case IF_PC_2A: // PC_2A X........X...... ......nnnnnddddd Rd Rn
return (ins == INS_autia || ins == INS_pacia);
return (ins == INS_autia || ins == INS_autib || ins == INS_pacia || ins == INS_pacib);

case IF_SR_1A: // SR_1A ................ ...........ttttt Rt (dc zva, mrs)
return ins == INS_mrs_tpid0;
Expand Down Expand Up @@ -3730,13 +3734,24 @@ void emitter::emitIns(instruction ins)
case INS_autia1716:
case INS_autiasp:
case INS_autiaz:
case INS_autib1716:
case INS_autibsp:
case INS_autibz:
case INS_pacia1716:
case INS_paciasp:
case INS_paciaz:
case INS_pacib1716:
case INS_pacibsp:
case INS_pacibz:
case INS_xpaclri:
assert(fmt == IF_PC_0A);
break;

case INS_retaa:
case INS_retab:
assert(fmt == IF_BR_0A);
break;

default:
assert(fmt == IF_SN_0A);
break;
Expand Down Expand Up @@ -3807,7 +3822,9 @@ void emitter::emitIns_R(instruction ins, emitAttr attr, regNumber reg, insOpts o

case INS_dczva:
case INS_autiza:
case INS_autizb:
case INS_paciza:
case INS_pacizb:
case INS_xpacd:
case INS_xpaci:
assert(isGeneralRegister(reg));
Expand Down Expand Up @@ -5115,7 +5132,9 @@ void emitter::emitIns_R_R(instruction ins,
break;

case INS_autia:
case INS_autib:
case INS_pacia:
case INS_pacib:
{
assert(insOptsNone(opt));
assert(isValidGeneralDatasize(size));
Expand Down Expand Up @@ -11354,6 +11373,13 @@ size_t emitter::emitOutputInstr(insGroup* ig, instrDesc* id, BYTE** dp)
sz = sizeof(instrDescJmp);
break;

case IF_BR_0A: // BR_0A ................ ................
assert(insOptsNone(id->idInsOpt()));
assert((ins == INS_retaa) || (ins == INS_retab));
code = emitInsCode(ins, fmt);
dst += emitOutput_Instr(dst, code);
break;

case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
assert(insOptsNone(id->idInsOpt()));
assert((ins == INS_ret) || (ins == INS_br));
Expand Down Expand Up @@ -13731,6 +13757,10 @@ void emitter::emitDispInsHelp(
}
break;

case IF_BR_0A: // BR_0A ................ ................
assert(insOptsNone(id->idInsOpt()));
break;

case IF_BR_1A: // BR_1A ................ ......nnnnn..... Rn
assert(insOptsNone(id->idInsOpt()));
emitDispReg(id->idReg1(), size, false);
Expand Down Expand Up @@ -15503,6 +15533,7 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
// otherwise we should have a br_tail instruction
assert(ins == INS_br_tail);
FALLTHROUGH;
case IF_BR_0A: // retaa, retab
case IF_BR_1A: // ret, br
result.insThroughput = PERFSCORE_THROUGHPUT_1C;
result.insLatency = PERFSCORE_LATENCY_1C;
Expand Down Expand Up @@ -16203,9 +16234,9 @@ emitter::insExecutionCharacteristics emitter::getInsExecutionCharacteristics(ins
}
break;

case IF_PC_0A: // autia1716, autiasp, autiaz, pacia1716, paciasp, paciaz, xpaclri
case IF_PC_1A: // autiza, paciza, xpacd, xpaci
case IF_PC_2A: // autia, pacia
case IF_PC_0A:
case IF_PC_1A:
case IF_PC_2A:
switch (ins)
{
case INS_xpacd:
Expand Down
7 changes: 4 additions & 3 deletions src/coreclr/jit/emitfmtsarm64.h
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Expand Up @@ -129,6 +129,7 @@ IF_DEF(BI_0B, IS_NONE, JMP) // BI_0B ......iiiiiiiiii iiiiiiiiiii.....
IF_DEF(BI_0C, IS_NONE, CALL) // BI_0C ......iiiiiiiiii iiiiiiiiiiiiiiii simm26:00 bl
IF_DEF(BI_1A, IS_NONE, JMP) // BI_1A X.......iiiiiiii iiiiiiiiiiittttt Rt simm19:00 cbz cbnz
IF_DEF(BI_1B, IS_NONE, JMP) // BI_1B B.......bbbbbiii iiiiiiiiiiittttt Rt imm6 simm14:00 tbz tbnz
IF_DEF(BR_0A, IS_NONE, CALL) // BR_0A ................ ................ retaa retab
IF_DEF(BR_1A, IS_NONE, CALL) // BR_1A ................ ......nnnnn..... Rn ret
IF_DEF(BR_1B, IS_NONE, CALL) // BR_1B ................ ......nnnnn..... Rn br blr

Expand Down Expand Up @@ -232,9 +233,9 @@ IF_DEF(SI_0A, IS_NONE, NONE) // SI_0A ...........iiiii iiiiiiiiiii.....
IF_DEF(SI_0B, IS_NONE, NONE) // SI_0B ................ ....bbbb........ imm4 - barrier

// Pointer Authentication (PAC) groups
IF_DEF(PC_0A, IS_NONE, NONE) // PC_0A ................ ................ (autia1716, autiasp, autiaz, pacia1716, paciasp, paciaz, xpaclri)
IF_DEF(PC_1A, IS_NONE, NONE) // PC_1A ................ ...........ddddd Rd (autiza, paciza, xpacd, xpaci)
IF_DEF(PC_2A, IS_NONE, NONE) // PC_2A X........X...... ......nnnnnddddd Rd Rn (autia, pacia)
IF_DEF(PC_0A, IS_NONE, NONE) // PC_0A ................ ................ (autia1716, autiasp, autib1716, autibsp, autibz, autiaz, pacia1716, paciasp, pacib1716, pacibsp, pacibz, paciaz, xpaclri)
IF_DEF(PC_1A, IS_NONE, NONE) // PC_1A ................ ...........ddddd Rd (autiza, autizb, paciza, pacizb, xpacd, xpaci)
IF_DEF(PC_2A, IS_NONE, NONE) // PC_2A X........X...... ......nnnnnddddd Rd Rn (autia, autib, pacia, pacib)

IF_DEF(SR_1A, IS_NONE, NONE) // SR_1A ................ ...........ttttt Rt (dc zva, mrs)

Expand Down
36 changes: 36 additions & 0 deletions src/coreclr/jit/instrsarm64.h
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Expand Up @@ -1314,6 +1314,12 @@ INST1(blr, "blr", 0, IF_BR_1B, 0xD63F0000)
INST1(ret, "ret", 0, IF_BR_1A, 0xD65F0000)
// ret Rn BR_1A 1101011001011111 000000nnnnn00000 D65F 0000

INST1(retaa, "retaa", 0, IF_BR_0A, 0xD65F0BFF)
// retaa BR_0A 1101011001011111 0000101111111111 D65F 0BFF

INST1(retab, "retab", 0, IF_BR_0A, 0xD65F0FFF)
// retab BR_0A 1101011001011111 0000111111111111 D65F 0FFF

INST1(beq, "beq", 0, IF_BI_0B, 0x54000000)
// beq simm19 BI_0B 01010100iiiiiiii iiiiiiiiiii00000 5400 0000 simm19:00

Expand Down Expand Up @@ -1593,6 +1599,15 @@ INST1(autia1716, "autia1716", 0, IF_PC_0A, 0xD503219F)
INST1(autiasp, "autiasp", 0, IF_PC_0A, 0xD50323BF)
// autiasp PC_0A 1101010100000011 0010001110111111 D503 23BF

INST1(autib1716, "autib1716", 0, IF_PC_0A, 0xD50321DF)
// autib1716 PC_0A 1101010100000011 0010000111011111 D503 21DF

INST1(autibsp, "autibsp", 0, IF_PC_0A, 0xD50323FF)
// autibsp PC_0A 1101010100000011 0010001111111111 D503 23FF

INST1(autibz, "autibz", 0, IF_PC_0A, 0xD50323DF)
// autibz PC_0A 1101010100000011 0010001111011111 D503 23DF

INST1(autiaz, "autiaz", 0, IF_PC_0A, 0xD503239F)
// autiaz PC_0A 1101010100000011 0010001110011111 D503 239F

Expand All @@ -1602,6 +1617,15 @@ INST1(pacia1716, "pacia1716 ", 0, IF_PC_0A, 0xD503211F)
INST1(paciasp, "paciasp", 0, IF_PC_0A, 0xD503233F)
// paciasp PC_0A 1101010100000011 0010001100111111 D503 233F

INST1(pacib1716, "pacib1716 ", 0, IF_PC_0A, 0xD503215F)
// pacib1716 PC_0A 1101010100000011 0010000101011111 D503 215F

INST1(pacibsp, "pacibsp", 0, IF_PC_0A, 0xD503237F)
// pacibsp PC_0A 1101010100000011 0010001101111111 D503 237F

INST1(pacibz, "pacibz", 0, IF_PC_0A, 0xD503235F)
// pacibz PC_0A 1101010100000011 0010001101011111 D503 235F

INST1(paciaz, "paciaz", 0, IF_PC_0A, 0xD503231F)
// paciaz PC_0A 1101010100000011 0010001100011111 D503 231F

Expand All @@ -1611,9 +1635,15 @@ INST1(xpaclri, "xpaclri", 0, IF_PC_0A, 0xD50320FF)
INST1(autiza, "autiza", 0, IF_PC_1A, 0xDAC133E0)
// autiza Rd PC_1A 1101101011000001 0001000000000000 DAC1 33E0

INST1(autizb, "autizb", 0, IF_PC_1A, 0xDAC137E0)
// autizb Rd PC_1A 1101101011000001 00110111111ddddd DAC1 37E0

INST1(paciza, "paciza", 0, IF_PC_1A, 0xDAC123E0)
// paciza Rd PC_1A 1101101011000001 00000011111ddddd DAC1 23E0

INST1(pacizb, "pacizb", 0, IF_PC_1A, 0xDAC127E0)
// pacizb Rd PC_1A 1101101011000001 00100111111ddddd DAC1 27E0

INST1(xpacd, "xpacd", 0, IF_PC_1A, 0xDAC147E0)
// xpacd Rd PC_0A 1101101011000001 0100011111100000 DAC1 47E0

Expand All @@ -1623,9 +1653,15 @@ INST1(xpaci, "xpaci", 0, IF_PC_1A, 0xDAC143E0)
INST1(autia, "autia", 0, IF_PC_2A, 0xDAC11000)
// autia Rd,Rn PC_2A 1101101011000001 00110011111ddddd DAC1 1000

INST1(autib, "autib", 0, IF_PC_2A, 0xDAC11400)
// autib Rd,Rn PC_2A 1101101011000001 000101nnnnnddddd DAC1 1400

INST1(pacia, "pacia", 0, IF_PC_2A, 0xDAC10000)
// pacia Rd,Rn PC_2A 1101101011000001 000000nnnnnddddd DAC1 0000

INST1(pacib, "pacib", 0, IF_PC_2A, 0xDAC10400)
// pacib Rd,Rn PC_2A 1101101011000001 000001nnnnnddddd DAC1 0400

INST1(nop, "nop", 0, IF_SN_0A, 0xD503201F)
// nop SN_0A 1101010100000011 0010000000011111 D503 201F

Expand Down
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