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49 changes: 39 additions & 10 deletions hw/top_chip/data/rstmgr_cfg.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_main_n
parent: sys_src
parent: lc_src
clock: main
}
{
Expand All @@ -122,11 +122,12 @@
domains:
[
Main
Aon
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_io_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -140,7 +141,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_device_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -154,7 +155,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_host_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -168,9 +169,23 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_i2c_n
parent: sys_src
parent: lc_src
clock: io
}
{
name: debug
gen: true
type: top
domains:
[
Main
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_debug_n
parent: sys_src
clock: main
}
]
leaf_rsts:
[
Expand Down Expand Up @@ -213,7 +228,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_main_n
parent: sys_src
parent: lc_src
clock: main
}
{
Expand All @@ -227,7 +242,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_io_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -241,7 +256,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_device_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -255,7 +270,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_host_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -269,9 +284,23 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_i2c_n
parent: sys_src
parent: lc_src
clock: io
}
{
name: debug
gen: true
type: top
domains:
[
Main
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_debug_n
parent: sys_src
clock: main
}
]
rst_ni: sys_src
export_rsts: {}
Expand Down
49 changes: 39 additions & 10 deletions hw/top_chip/ip_autogen/rstmgr/data/mocha_rstmgr.ipconfig.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_main_n
parent: sys_src
parent: lc_src
clock: main
}
{
Expand All @@ -122,11 +122,12 @@
domains:
[
Main
Aon
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_io_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -140,7 +141,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_device_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -154,7 +155,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_host_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -168,9 +169,23 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_i2c_n
parent: sys_src
parent: lc_src
clock: io
}
{
name: debug
gen: true
type: top
domains:
[
Main
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_debug_n
parent: sys_src
clock: main
}
]
leaf_rsts:
[
Expand Down Expand Up @@ -213,7 +228,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_main_n
parent: sys_src
parent: lc_src
clock: main
}
{
Expand All @@ -227,7 +242,7 @@
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_io_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -241,7 +256,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_device_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -255,7 +270,7 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_spi_host_n
parent: sys_src
parent: lc_src
clock: io
}
{
Expand All @@ -269,9 +284,23 @@
shadowed: false
sw: true
path: rstmgr_aon_resets.rst_i2c_n
parent: sys_src
parent: lc_src
clock: io
}
{
name: debug
gen: true
type: top
domains:
[
Main
]
shadowed: false
sw: false
path: rstmgr_aon_resets.rst_debug_n
parent: sys_src
clock: main
}
]
rst_ni: sys_src
export_rsts: {}
Expand Down
2 changes: 2 additions & 0 deletions hw/top_chip/ip_autogen/rstmgr/dv/cov/rstmgr_tgl_excl.cfg
Original file line number Diff line number Diff line change
Expand Up @@ -20,3 +20,5 @@
-module_node rstmgr rst_en_o.spi_host[DomainAonSel]
-module_node rstmgr resets_o.rst_i2c_n[DomainAonSel]
-module_node rstmgr rst_en_o.i2c[DomainAonSel]
-module_node rstmgr resets_o.rst_debug_n[DomainAonSel]
-module_node rstmgr rst_en_o.debug[DomainAonSel]
1 change: 1 addition & 0 deletions hw/top_chip/ip_autogen/rstmgr/dv/env/rstmgr_env_pkg.sv
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ package rstmgr_env_pkg;
parameter string LIST_OF_LEAFS[] = {
"u_daon_por",
"u_daon_por_io",
"u_dmain_debug",
"u_dmain_i2c",
"u_dmain_io",
"u_dmain_main",
Expand Down
30 changes: 16 additions & 14 deletions hw/top_chip/ip_autogen/rstmgr/dv/sva/rstmgr_cascading_sva_if.sv
Original file line number Diff line number Diff line change
Expand Up @@ -158,21 +158,23 @@ interface rstmgr_cascading_sva_if (
`CASCADED_ASSERTS(CascadeEffAonToRstPorMain, effective_aon_rst_n[rstmgr_pkg::DomainAonSel],
resets_o.rst_por_n[rstmgr_pkg::DomainAonSel], SyncCycles, clk_main_i)

// Controlled by rst_sys_src_n.
`CASCADED_ASSERTS(CascadeSysToMain_A, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_main_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_main_i)

`CASCADED_ASSERTS(CascadeSysToIO_A, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_io_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_io_i)

`CASCADED_ASSERTS(CascadeSysToSPIHost_A, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_spi_host_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_io_i)
// Controlled by rst_lc_src_n.
`CASCADED_ASSERTS(CascadeLcToAon, rst_lc_src_n[rstmgr_pkg::DomainAonSel],
resets_o.rst_io_n[rstmgr_pkg::DomainAonSel], SysCycles, clk_aon_i)
`CASCADED_ASSERTS(CascadeLcToMain, rst_lc_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_main_n[rstmgr_pkg::DomainMainSel], SysCycles, clk_main_i)
`CASCADED_ASSERTS(CascadeLcToIo, rst_lc_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_io_n[rstmgr_pkg::DomainMainSel], SysCycles, clk_io_i)
`CASCADED_ASSERTS(CascadeLcToSpiDevice, rst_lc_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_spi_device_n[rstmgr_pkg::DomainMainSel], SysCycles, clk_io_i)
`CASCADED_ASSERTS(CascadeLcToSpiHost, rst_lc_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_spi_host_n[rstmgr_pkg::DomainMainSel], SysCycles, clk_io_i)
`CASCADED_ASSERTS(CascadeLcToI2c, rst_lc_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_i2c_n[rstmgr_pkg::DomainMainSel], SysCycles, clk_io_i)

`CASCADED_ASSERTS(CascadeSysToSPIDevice_A, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_spi_device_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_io_i)

`CASCADED_ASSERTS(CascadeSysToI2C_A, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_i2c_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_io_i)
// Controlled by rst_sys_src_n.
`CASCADED_ASSERTS(CascadeSysToDebug, rst_sys_src_n[rstmgr_pkg::DomainMainSel],
resets_o.rst_debug_n[rstmgr_pkg::DomainMainSel], PeriCycles, clk_main_i)

`undef FALL_ASSERT
`undef RISE_ASSERTS
Expand Down
26 changes: 26 additions & 0 deletions hw/top_chip/ip_autogen/rstmgr/dv/sva/rstmgr_rst_en_track_sva_if.sv
Original file line number Diff line number Diff line change
Expand Up @@ -94,6 +94,19 @@ interface rstmgr_rst_en_track_sva_if (
clk_io_i,
!rst_por_ni)

`ASSERT(DAonRstIoEnTracksRstIoActive_A,
$fell(resets_i.rst_io_n[DomainAonSel]) |-> ##[0:DELAY]
reset_en_i.io[DomainAonSel] == prim_mubi_pkg::MuBi4True,
clk_io_i,
!rst_por_ni)

`ASSERT(DAonRstIoEnTracksRstIoInactive_A,
$rose(resets_i.rst_io_n[DomainAonSel]) |-> ##DELAY
!resets_i.rst_io_n[DomainAonSel] ||
reset_en_i.io[DomainAonSel] == prim_mubi_pkg::MuBi4False,
clk_io_i,
!rst_por_ni)

`ASSERT(DMainRstSpiDeviceEnTracksRstSpiDeviceActive_A,
$fell(resets_i.rst_spi_device_n[DomainMainSel]) |-> ##[0:DELAY]
reset_en_i.spi_device[DomainMainSel] == prim_mubi_pkg::MuBi4True,
Expand Down Expand Up @@ -133,4 +146,17 @@ interface rstmgr_rst_en_track_sva_if (
clk_io_i,
!rst_por_ni)

`ASSERT(DMainRstDebugEnTracksRstDebugActive_A,
$fell(resets_i.rst_debug_n[DomainMainSel]) |-> ##[0:DELAY]
reset_en_i.debug[DomainMainSel] == prim_mubi_pkg::MuBi4True,
clk_main_i,
!rst_por_ni)

`ASSERT(DMainRstDebugEnTracksRstDebugInactive_A,
$rose(resets_i.rst_debug_n[DomainMainSel]) |-> ##DELAY
!resets_i.rst_debug_n[DomainMainSel] ||
reset_en_i.debug[DomainMainSel] == prim_mubi_pkg::MuBi4False,
clk_main_i,
!rst_por_ni)

endinterface
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